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ralink: fix mt7628 ehci support
the u2_phy init was missing Backport of r48747 Signed-off-by: John Crispin <blogic@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/branches/chaos_calmer@48749 3c298f89-4303-0410-b956-a3cf2f4a3e73
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2b059d0313
commit
d4b09841a9
@ -337,12 +337,13 @@
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#reset-cells = <1>;
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};
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usbphy: usbphy {
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usbphy: usbphy@10120000 {
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compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
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reg = <0x10120000 1000>;
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#phy-cells = <1>;
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resets = <&rstctrl 22>;
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reset-names = "host";
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resets = <&rstctrl 22 &rstctrl 25>;
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reset-names = "host", "device";
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};
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sdhci@10130000 {
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@ -1,6 +1,6 @@
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--- a/drivers/phy/Kconfig
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+++ b/drivers/phy/Kconfig
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@@ -239,6 +239,11 @@ config PHY_XGENE
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@@ -239,6 +239,11 @@
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help
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This option enables support for APM X-Gene SoC multi-purpose PHY.
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@ -14,18 +14,18 @@
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depends on RESET_CONTROLLER
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--- a/drivers/phy/Makefile
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+++ b/drivers/phy/Makefile
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@@ -31,3 +31,4 @@ obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY) +=
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@@ -31,3 +31,4 @@
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obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
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obj-$(CONFIG_PHY_STIH407_USB) += phy-stih407-usb.o
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obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
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+obj-$(CONFIG_PHY_RALINK_USB) += phy-ralink-usb.o
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--- /dev/null
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+++ b/drivers/phy/phy-ralink-usb.c
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@@ -0,0 +1,175 @@
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@@ -0,0 +1,228 @@
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+/*
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+ * Allwinner ralink USB phy driver
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+ *
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+ * Copyright (C) 2014 John Crispin <blogic@openwrt.org>
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+ * Copyright (C) 2016 John Crispin <blogic@openwrt.org>
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+ *
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+ * Based on code from
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+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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@ -58,6 +58,20 @@
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+#define RT_SYSC_REG_CLKCFG1 0x030
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+#define RT_SYSC_REG_USB_PHY_CFG 0x05c
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+
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+#define OFS_U2_PHY_AC0 0x00
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+#define OFS_U2_PHY_AC1 0x04
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+#define OFS_U2_PHY_AC2 0x08
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+#define OFS_U2_PHY_ACR0 0x10
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+#define OFS_U2_PHY_ACR1 0x14
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+#define OFS_U2_PHY_ACR2 0x18
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+#define OFS_U2_PHY_ACR3 0x1C
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+#define OFS_U2_PHY_ACR4 0x20
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+#define OFS_U2_PHY_AMON0 0x24
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+#define OFS_U2_PHY_DCR0 0x60
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+#define OFS_U2_PHY_DCR1 0x64
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+#define OFS_U2_PHY_DTM0 0x68
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+#define OFS_U2_PHY_DTM1 0x6C
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+
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+#define RT_RSTCTRL_UDEV BIT(25)
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+#define RT_RSTCTRL_UHST BIT(22)
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+#define RT_SYSCFG1_USB0_HOST_MODE BIT(10)
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@ -70,117 +84,156 @@
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+#define USB_PHY_UTMI_8B60M BIT(1)
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+#define UDEV_WAKEUP BIT(0)
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+
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+static atomic_t usb_pwr_ref = ATOMIC_INIT(0);
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+static struct reset_control *rstdev;
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+static struct reset_control *rsthost;
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+static u32 phy_clk;
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+static struct phy *rt_phy;
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+struct ralink_usb_phy {
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+ struct reset_control *rstdev;
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+ struct reset_control *rsthost;
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+ u32 clk;
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+ struct phy *phy;
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+ void __iomem *base;
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+};
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+
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+static void usb_phy_enable(int state)
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+static void u2_phy_w32(struct ralink_usb_phy *phy, u32 val, u32 reg)
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+{
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+ if (state)
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+ rt_sysc_m32(0, phy_clk, RT_SYSC_REG_CLKCFG1);
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+ else
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+ rt_sysc_m32(phy_clk, 0, RT_SYSC_REG_CLKCFG1);
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+ mdelay(100);
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+ iowrite32(val, phy->base + reg);
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+}
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+
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+static int ralink_usb_phy_init(struct phy *_phy)
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+static u32 u2_phy_r32(struct ralink_usb_phy *phy, u32 reg)
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+{
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+ return 0;
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+ return ioread32(phy->base + reg);
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+}
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+
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+static int ralink_usb_phy_exit(struct phy *_phy)
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+static void
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+u2_phy_init(struct ralink_usb_phy *phy)
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+{
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+ return 0;
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+ u2_phy_r32(phy, OFS_U2_PHY_AC2);
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+ u2_phy_r32(phy, OFS_U2_PHY_ACR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+
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+ u2_phy_w32(phy, 0x00ffff02, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x00555502, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x00aaaa02, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x00000402, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x0048086a, OFS_U2_PHY_AC0);
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+ u2_phy_w32(phy, 0x4400001c, OFS_U2_PHY_AC1);
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+ u2_phy_w32(phy, 0xc0200000, OFS_U2_PHY_ACR3);
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+ u2_phy_w32(phy, 0x02000000, OFS_U2_PHY_DTM0);
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+}
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+
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+static int ralink_usb_phy_power_on(struct phy *_phy)
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+{
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+ if (atomic_inc_return(&usb_pwr_ref) == 1) {
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+ int host = 1;
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+ u32 t;
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+ struct ralink_usb_phy *phy = phy_get_drvdata(_phy);
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+ u32 t;
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+
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+ usb_phy_enable(1);
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+ /* enable the phy */
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+ rt_sysc_m32(0, phy->clk, RT_SYSC_REG_CLKCFG1);
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+
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+ if (host) {
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+ rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
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+ if (!IS_ERR(rsthost))
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+ reset_control_deassert(rsthost);
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+ if (!IS_ERR(rstdev))
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+ reset_control_deassert(rstdev);
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+ } else {
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+ rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1);
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+ if (!IS_ERR(rstdev))
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+ reset_control_deassert(rstdev);
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+ }
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+ mdelay(100);
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+ /* setup host mode */
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+ rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
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+
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+ t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
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+ dev_info(&_phy->dev, "remote usb device wakeup %s\n",
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+ (t & UDEV_WAKEUP) ? ("enabbled") : ("disabled"));
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+ if (t & USB_PHY_UTMI_8B60M)
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+ dev_info(&_phy->dev, "UTMI 8bit 60MHz\n");
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+ else
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+ dev_info(&_phy->dev, "UTMI 16bit 30MHz\n");
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+ }
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+ /* deassert the reset lines */
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+ reset_control_deassert(phy->rsthost);
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+ reset_control_deassert(phy->rstdev);
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+
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+ /*
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+ * The SDK kernel had a delay of 100ms. however on device
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+ * testing showed that 10ms is enough
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+ */
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+ mdelay(10);
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+
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+ if (!IS_ERR(phy->base))
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+ u2_phy_init(phy);
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+
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+ /* print some status info */
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+ t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
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+ dev_info(&phy->phy->dev, "remote usb device wakeup %s\n",
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+ (t & UDEV_WAKEUP) ? ("enabled") : ("disabled"));
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+ if (t & USB_PHY_UTMI_8B60M)
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+ dev_info(&phy->phy->dev, "UTMI 8bit 60MHz\n");
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+ else
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+ dev_info(&phy->phy->dev, "UTMI 16bit 30MHz\n");
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+
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+ return 0;
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+}
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+
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+static int ralink_usb_phy_power_off(struct phy *_phy)
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+{
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+ if (atomic_dec_return(&usb_pwr_ref) == 0) {
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+ usb_phy_enable(0);
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+ if (!IS_ERR(rstdev))
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+ reset_control_assert(rstdev);
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+ if (!IS_ERR(rsthost))
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+ reset_control_assert(rsthost);
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+ }
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+ struct ralink_usb_phy *phy = phy_get_drvdata(_phy);
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+
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+ /* assert the reset lines */
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+ reset_control_assert(phy->rstdev);
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+ reset_control_assert(phy->rsthost);
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+
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+ /* disable the phy */
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+ rt_sysc_m32(phy->clk, 0, RT_SYSC_REG_CLKCFG1);
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+
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+ return 0;
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+}
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+
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+static struct phy_ops ralink_usb_phy_ops = {
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+ .init = ralink_usb_phy_init,
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+ .exit = ralink_usb_phy_exit,
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+ .power_on = ralink_usb_phy_power_on,
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+ .power_off = ralink_usb_phy_power_off,
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+ .owner = THIS_MODULE,
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+};
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+
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+static struct phy *ralink_usb_phy_xlate(struct device *dev,
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+ struct of_phandle_args *args)
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+{
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+ return rt_phy;
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+}
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+
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+static const struct of_device_id ralink_usb_phy_of_match[] = {
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+ { .compatible = "ralink,rt3xxx-usbphy", .data = (void *) (RT_CLKCFG1_UPHY1_CLK_EN | RT_CLKCFG1_UPHY0_CLK_EN) },
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+ { .compatible = "ralink,mt7620a-usbphy", .data = (void *) (MT7620_CLKCFG1_UPHY1_CLK_EN | MT7620_CLKCFG1_UPHY0_CLK_EN) },
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+ {
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+ .compatible = "ralink,rt3xxx-usbphy",
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+ .data = (void *) (RT_CLKCFG1_UPHY1_CLK_EN |
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+ RT_CLKCFG1_UPHY0_CLK_EN)
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+ },
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+ {
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+ .compatible = "ralink,mt7620a-usbphy",
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+ .data = (void *) (MT7620_CLKCFG1_UPHY1_CLK_EN |
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+ MT7620_CLKCFG1_UPHY0_CLK_EN) },
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+ { },
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+};
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+MODULE_DEVICE_TABLE(of, ralink_usb_phy_of_match);
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+
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+static int ralink_usb_phy_probe(struct platform_device *pdev)
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+{
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+ struct resource *res;
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+ struct device *dev = &pdev->dev;
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+ struct phy_provider *phy_provider;
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+ const struct of_device_id *match;
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+ struct ralink_usb_phy *phy;
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+
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+ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
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+ if (!phy)
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+ return -ENOMEM;
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+
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+ match = of_match_device(ralink_usb_phy_of_match, &pdev->dev);
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+ phy_clk = (int) match->data;
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+ if (!match)
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+ return -ENODEV;
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+
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+ rsthost = devm_reset_control_get(&pdev->dev, "host");
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+ rstdev = devm_reset_control_get(&pdev->dev, "device");
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+ phy->clk = (int) match->data;
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+
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+ rt_phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops, NULL);
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+ if (IS_ERR(rt_phy)) {
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+ dev_err(dev, "failed to create PHY\n");
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+ return PTR_ERR(rt_phy);
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ phy->base = devm_ioremap_resource(&pdev->dev, res);
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+
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+ phy->rsthost = devm_reset_control_get(&pdev->dev, "host");
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+ if (IS_ERR(phy->rsthost)) {
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+ dev_err(dev, "host reset is missing\n");
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+ return PTR_ERR(phy->rsthost);
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+ }
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+
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+ phy_provider = devm_of_phy_provider_register(dev, ralink_usb_phy_xlate);
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+ phy->rstdev = devm_reset_control_get(&pdev->dev, "device");
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+ if (IS_ERR(phy->rstdev)) {
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+ dev_err(dev, "device reset is missing\n");
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+ return PTR_ERR(phy->rstdev);
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+ }
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+
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+ phy->phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops, NULL);
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+ if (IS_ERR(phy->phy)) {
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+ dev_err(dev, "failed to create PHY\n");
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+ return PTR_ERR(phy->phy);
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+ }
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+ phy_set_drvdata(phy->phy, phy);
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+
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+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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+
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+ return PTR_ERR_OR_ZERO(phy_provider);
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+}
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