It will now actually enable the mib counters instead of enabling rx/tx for
the first switch port.
Reported-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44788 3c298f89-4303-0410-b956-a3cf2f4a3e73
For bcm63xx integrated switches, broadcom changed the data endianess
to match the system endianess. But this only applies to within one word,
which causes 48/64 bit values to be still split into their "litte endian"
groups.
E.g. 48 bit values (with 5 being the most significant byte) aligned
0x00 ..01 or 0123
0x04 2345 45..
will become
0x00 ..10 resp. 3210
0x04 5432 54..
Likewise for 64 bit values.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44568 3c298f89-4303-0410-b956-a3cf2f4a3e73
According to the thread https://forum.openwrt.org/viewtopic.php?id=48281
b53 uses GPIO 7:
[ 4.470000] b53_common: [DBG] b53_switch_reset_gpio using 7
and causes device to self-reboot. GPIO 8 was found in CFE boot log:
"Reset switch via GPIO 8 ..."
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41526 3c298f89-4303-0410-b956-a3cf2f4a3e73
we should not abuse the platform_data pointer.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39354 3c298f89-4303-0410-b956-a3cf2f4a3e73
The BCM5365 needs a shift of 7 bits and not 6 bits like the BCM5325 for
the untagged ports.
Thank you Russell for reporting this and testing the patch.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38793 3c298f89-4303-0410-b956-a3cf2f4a3e73
This is also known as BCM470{7,8,9}.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38712 3c298f89-4303-0410-b956-a3cf2f4a3e73
The SRAB interface is used on BCM4707 and BCM5301X SoCs.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38198 3c298f89-4303-0410-b956-a3cf2f4a3e73
The revision is stored in a different register than it is in other
Broadcom switches.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37995 3c298f89-4303-0410-b956-a3cf2f4a3e73
These switches are integrated in some recent BCM53XX and BCM47XX SoCs
like the BCM53572.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37994 3c298f89-4303-0410-b956-a3cf2f4a3e73
The Linksys wrt310n v1 does not have a robo_reset config variable in
nvram, but GPIO Pin 8 is the pin needed for resetting the external
switch, Linksys hard coded it into their source code.
Thank you Devastator for testing.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37988 3c298f89-4303-0410-b956-a3cf2f4a3e73
BCM5365 (and probably other older variants) use a different phy id, so
the phy driver never attached for them.
Fix this by adding the appropriate phy id to the fixup and the phy
driver.
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37906 3c298f89-4303-0410-b956-a3cf2f4a3e73
b53_no_ops has no elements and b53_port_ops has one element, this makes
the code access some random memory when trying to access the mib
counter functions.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37895 3c298f89-4303-0410-b956-a3cf2f4a3e73
This is needed for some switches used on bcm47xx SoCs like the one on the Asus RT-N66U.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37645 3c298f89-4303-0410-b956-a3cf2f4a3e73
This makes it possible to use swconfig to controll the switch.
This was tested with devices using b43 and bgmac.
This was not tested on devices using tg3.
This does not support the adm switch used in some very old devices.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37304 3c298f89-4303-0410-b956-a3cf2f4a3e73
Setting this bit stops BCM53125 (bgmac actually) from receiving any
packets. This bit is cleared conditionally in b53_switch_reset and it
seems the same is done in bcmrobo.c which never sets that bit again.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35723 3c298f89-4303-0410-b956-a3cf2f4a3e73
b53_switch_detect returns value returned by b53_read8, which is 0 for
success. So fail (and return error) only if b53_switch_detect returned
something else than 0. This fixes supported and advertising being zeros
for MDIO access.
Cc: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35534 3c298f89-4303-0410-b956-a3cf2f4a3e73
These attributes where removed with kernel 3.8 and are now causing compile errors.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35328 3c298f89-4303-0410-b956-a3cf2f4a3e73
Add swconfig switch driver for Broadcom BCM53XX switch chips. Supports
switches connected through MDIO, SPI or memory mapped registers, and
supports BCM5325, BCM539x, BCM531x5 and the BCM63XX internal switch
chips.
Tested are BCM5325 trough MDIO, BCM53115 through SPI, and BCM6328.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35305 3c298f89-4303-0410-b956-a3cf2f4a3e73
