Sven Eckelmann b92fcfb75e ar71xx: Use PHY fixups for Open Mesh MR1750 ...

The delays of PHY/MAC on the MR1750 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.

This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.

Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

Backport of r49031

2016-09-21 18:16:54 +02:00

..

imagebuilder

imagebuilder: create cache directory if needed (#18629)

2015-06-01 06:15:39 +00:00

linux

ar71xx: Use PHY fixups for Open Mesh MR1750

2016-09-21 18:16:54 +02:00

sdk

CC: sdk: add base repository fallback

2016-01-12 09:27:30 +00:00

toolchain

toolchain: respect CONFIG_VERSION_FILENAMES and add host system suffix

2015-02-07 21:01:37 +00:00

Config.in

build: remove obsolete references to cris and avr32

2015-03-24 10:07:40 +00:00

Makefile

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