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CC: ar71xx: fix ath79_soc_rev value for QCA9531 ver. 2

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ath9k expects to get revision id 2 for the QCA9531 ver. 2 rev. 0. This
fixes the very low TX power on some devices like the TP-LINK
TL-WR841ND v10

As ath79_soc_rev is only used to get the revision number to ath9k on the
QCA9533, just set it to the expected value on the ver. 2.

Backport of r47262

Signed-off-by: Matteo Valentini <matteo.valentini@wiman.me>

git-svn-id: svn://svn.openwrt.org/openwrt/branches/chaos_calmer@47787 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
Felix Fietkau
2015-12-05 09:57:23 +00:00
parent c7feed7fe9
commit a51fcab27f
2 changed files with 12 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
View File

@@ -292,12 +292,13 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
major = id & REV_ID_MAJOR_MASK;
@@ -151,6 +152,16 @@ static void __init ath79_detect_sys_type
@@ -151,6 +152,17 @@ static void __init ath79_detect_sys_type
rev = id & AR934X_REV_ID_REVISION_MASK;
break;
+ case REV_ID_MAJOR_QCA9533_V2:
+ ver = 2;
+ ath79_soc_rev = 2;
+ /* drop through */
+
+ case REV_ID_MAJOR_QCA9533:
@@ -309,9 +310,13 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
case REV_ID_MAJOR_QCA9556:
ath79_soc = ATH79_SOC_QCA9556;
chip = "9556";
@@ -169,9 +180,9 @@ static void __init ath79_detect_sys_type
@@ -167,11 +179,12 @@ static void __init ath79_detect_sys_type
panic("ath79: unknown SoC, id:0x%08x", id);
}
ath79_soc_rev = rev;
- ath79_soc_rev = rev;
+ if (ver == 1)
+ ath79_soc_rev = rev;
- if (soc_is_qca955x())
- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",

7
target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
View File

@@ -519,7 +519,7 @@
return -ENODEV;
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -175,15 +175,30 @@ static void __init ath79_detect_sys_type
@@ -176,6 +176,18 @@ static void __init ath79_detect_sys_type
rev = id & QCA955X_REV_ID_REVISION_MASK;
break;
@@ -538,8 +538,9 @@
default:
panic("ath79: unknown SoC, id:0x%08x", id);
}
ath79_soc_rev = rev;
@@ -183,9 +195,12 @@ static void __init ath79_detect_sys_type
if (ver == 1)
ath79_soc_rev = rev;
- if (soc_is_qca953x() || soc_is_qca955x())
+ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561())