Felix Fietkau 6bc40a3f04 ar71xx: Remove TX/RX delay from pll_1000 for OM5P-AN
The tx/rx delay bits in the ETH_XMII_CONTROL register have to be unset when the
enable_rgmii_rx_delay/enable_rgmii_tx_delay will be set in the AT803x PHY.
Othwise the throughput in gigabit mode is heavily reduced.

Signed-off-by: Sven Eckelmann <sven@open-mesh.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45521 3c298f89-4303-0410-b956-a3cf2f4a3e73
2015-04-20 15:00:20 +00:00
..